Cryptographic devices can be attacked by analyzing the power consumption using statistical analysis in a technique known as Differential Power Analysis (DPA). However, DPA attacks are sensitive to measurement misalignments in power samples that reduce the dependency between power / data. A countermeasure technique that increases this misalignment by inserting random delays, namely Random Delay Insertion, was shown to be effective against DPA on hardware implementations. A Differential Frequency-based Attack (DFA) is a DPA technique that involves a frequency-based pre-processing step and it can be utilized to attack security implementations that include misalignments. In this research, a DFA attack is carried out on an AES algorithm implemented on both ASIC and FPGA devices. The results indicate that the length of delay which the DFA attack can reduce is limited. Therefore, the RDI countermeasure is effective against DFA when the inserted delay is larger than the effective DFA window size.